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Accelerate Release Notes
(HTML)
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Release Note |
2007-10-31
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Accelerate Reference Update
(HTML)
(PDF)
Summarizes the symbols added to the Accelerate framework.
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Reference |
2007-07-18
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vDSP Complex Vector Conversion Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Correlation, Convolution, and Filtering Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Matrix Operations Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP One-Dimensional Fast Fourier Transforms Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Reference Collection
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Single-Vector Operations Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Two-Dimensional Fast Fourier Transforms Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Vector Scalar Arithmetic Operations Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Vector-To-Scalar Operations Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Vector-to-Vector Arithmetic Operations Reference
(HTML)
(PDF)
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Reference |
2007-06-15
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vDSP Examples
(HTML)
(DMG)
(ZIP)
vDSP sample code
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Sample Code |
2007-05-10
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Test64BitMultiprec
(HTML)
(DMG)
(ZIP)
Implements (PPC) A*Y+B where A & B are arrays of 64-bit words and Y is a 64-bit integer
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Sample Code |
2006-06-09
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Taking Advantage of the Accelerate Framework
(HTML)
Learn how your application can run on PowerPC- or Intel-based Macs without processor-specific customization.
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Articles |
2005-10-03
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AltiVec/SSE Migration Guide
(HTML)
(PDF)
Explains how to convert PowerPC AltiVec code to Intel SSE code.
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Guides |
2005-09-08
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vecLib Reference Update
(HTML)
(PDF)
Summarizes the symbols added to the vecLib framework.
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Reference |
2005-06-04
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dist_fft
(HTML)
(DMG)
(ZIP)
Gigaelement FFTs on Apple G5 clusters
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Sample Code |
2004-08-23
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Optimizing for the Power Mac G5
(HTML)
Learn how to optimize your code for the Power Mac G5.
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Articles |
2003-10-24
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VelEng FFT
(HTML)
(DMG)
(ZIP)
G4 Velocity Engine implementation of Fast Fourier Transform (FFT) and associated convolution/correlation routines.
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Sample Code |
2003-01-14
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VelEng Multiprecision
(HTML)
(DMG)
(ZIP)
An implementation of arbitrary precision arithmetic using the PowerPC Velocity-Engine (G4) vector instructions.
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Sample Code |
2003-01-14
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VelEng Wavelet
(HTML)
(DMG)
(ZIP)
This demonstrates a Velocity Engine (G4) implementation of wavelet processing of color images
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Sample Code |
2003-01-14
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Disabling a Processor on a Multiprocessor System
(HTML)
( )
QA1141: Describes how to disable a processor on a multiprocessor system for testing purposes.
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Technical Q&A |
2002-05-22
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