PCI Bus

The PCI bus was standardized in the early 1990s as a replacement for a variety of I/O buses. Apple incorporated PCI in Mac computers in 1995, replacing the Nubus used in the Power Macintosh 6100/7100/8100 and earlier models. The benefits of PCI include the following:

• A single method for connecting both ASIC chips and plug-in expansion cards to a computer’s main memory and processing circuitry

• Support for lower-voltage (3.3 V) signals

• 32-bit and 64-bit bus widths

• Cross-platform compatibility of expansion cards

• Easier implementation of plug-and-play capabilities

• Clock rate of up to 66 MHz

As the speeds of processors and other components increased, limitations of the PCI bus were addressed with the introduction of the Accelerated Graphics Port (AGP bus) for video support and PCI-X for other high-bandwidth needs such as I/O expansion cards.

PCI Express

At today's high clock rates, the parallel nature of the PCI bus (and the derivative AGP bus) exacerbates data transmission problems. Even the smallest differences in bus board traces can magnify noise, waveform quality degradation, and signal timing errors. The serial PCI Express architecture is an industry-standard third generation I/O bus designed to overcome such limitations of the parallel PCI bus architecture.

A PCI Express connection (known as a link) consists of one or more point-to-point connections called lanes, each of which has two pairs of conductors, a transmit pair and a receive pair. PCI Express uses low-voltage differential (LVD) signaling and an 8B/10B encoding scheme on these lanes, preserving signal integrity at high transmission rates. A link can comprise 1, 2, 4, 8, 12, 16, or 32 lanes.

PCI Express retains most of the best features of the previous generation PCI and PCI-X architectures. PCI Express has the same usage model and load-storage communication model as PCI and PCI-X. It supports the same IO read/write and configuration read/write transactions. The memory read/write transactions and IO and configuration address space model is the same. Because the address space model is the same, existing OS and driver software will run on a PCI Express system, providing backwards software compatibility.