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Architecture
This chapter describes the architecture of the iBook.
Block Diagram and Buses
This section is an overview of the major ICs and buses on the computer’s main logic board.
Block Diagram
Figure 2-1 is a simplified block diagram of the main logic board. The diagram shows the input and output connectors, the main ICs, and the buses that connect them together.

Main ICs and Buses
The architecture of the iBook is designed around the PowerPC G4 microprocessor and the Intrepid IC, which provides the functions of a memory controller and an I/O device controller.
The PowerPC G4 microprocessor is connected to the Intrepid IC by a MaxBus. The maximum bus clock speed is 133 MHz or 142 MHz. Additional buses implemented by the Intrepid IC are summarized in Table 2-1.
The Intrepid IC has a 32-bit PCI bus with a bus clock speed of 33 MHz. The PCI bus also connects to the Boot ROM and the wireless LAN module. The Intrepid IC has other buses that connect with the hard disk drive, the optical drive, the power controller IC, the sound IC, and the internal modem module.
Each of the components listed here is described in one of the following sections.
Microprocessor and Cache
The microprocessor communicates with the rest of the system by way of a 64-bit MaxBus bus to the Intrepid IC. The microprocessor has a separate bus to its internal second-level cache.
PowerPC G4 Microprocessor
The PowerPC G4 microprocessor used in the iBook has many powerful features, including an efficient pipelined system bus called MaxBus.
Features of the PowerPC G4 include
32-bit PowerPC implementation
superscalar PowerPC core
Velocity Engine (AltiVec technology): 128-bit-wide vector execution unit
dual 32 KB instruction and data caches
an on-chip level 2 (L2) cache consisting of 512 KB with a clock speed ratio of 1:1
high bandwidth MaxBus (also compatible with 60x bus)
fully symmetric multiprocessing capability
The PowerPC G4 microprocessor in the iBook runs at a maximum clock speed of 1.33 GHz on the 12.1-inch model and 1.42 GHz on the 14.1-inch model.
L2 Cache
The data storage for the L2 cache consists of 512 KB of fast static RAM that is built into the microprocessor chip along with the cache controller and tag storage. The built-in L2 cache runs at the same clock speed as the microprocessor.
Intrepid Memory and I/O Device Controller
The Intrepid memory and I/O device controller IC provides cost and performance benefits by combining many functions into a single IC. It also contains the PCI bus bridge, the Ethernet, FireWire, and USB interfaces, and the AGP port.
In addition to the buses listed in Table 2-1, the Intrepid IC has separate interfaces to the physical layer (PHY) ICs for Ethernet and FireWire. Also, Intrepid has an I2C interface to configure the memory subsystem and an OHCI USB controller to connect the internal modem and Bluetooth modules.
The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the I/O channels. The DB-DMA system provides a scatter-gather process based on memory resident data structures that describe the data transfers. The DMA engine is enhanced to allow bursting of data files for improved performance.
The microprocessor is described in its own section. The following sections describe the other subsystems that are connected to the Intrepid IC.
System RAM
The memory subsystem in the iBook consists of 512 MB of DDR266B (PC2100) SDRAM soldered on the main logic board. The expansion slot capacity is an additional 128, 256, 512 MB, or 1 GB supporting a maximum of 1.5 GB.
The data bus to the RAM and SO-DIMM is 64 bits wide, and the memory interface is synchronized to the MaxBus interface at maximum speed of 133 MHz or 142 MHz. For more information, see RAM Expansion.
Boot ROM
The boot ROM includes the hardware-specific code and tables needed to start up the computer, to load an operating system, and to provide common hardware access services.
The boot ROM is connected to the card slot interface of the Intrepid IC. The boot ROM is a 1 M by 8 bit flash device and can be updated in the field.
Ethernet Controller
The Intrepid IC includes an Ethernet media access controller (MAC) that implements the link layer. As a separate channel connected directly to the Intrepid logic, it can operate at its full capacity without degrading the performance of other peripheral devices.
The controller is connected to a PHY interface IC that is capable of operating in either 10-BASE-T or 100-BASE-T mode. The actual speed of the link is automatically negotiated by the PHY and the bridge or router to which it is connected. For information about the connector and the operation of the port, see Ethernet Port.
FireWire 400 Controller
The Intrepid IC includes an IEEE 1394a FireWire 400 controller with a maximum data rate of 400 Mbits (50 MBytes) per second. The Intrepid IC provides DMA (direct memory access) support for the FireWire400 interface. The FireWire controller complies with the Open Host Controller Interface (OHCI) specification.
The controller IC implements the FireWire link layer. A physical layer IC, called a PHY, implements the electrical signalling protocol of the FireWire interface. The PHY is the interface to the external connector. For information about the connector and the operation of the port, see FireWire 400 Port.
Graphics IC
The graphics IC is an ATI Mobility Radeon 9550 with 32 MB video memory. It provides video for both the internal flat panel display and an external video display. The signals to the external display can be either VGA, composite video, or S-video; for more information, seeExternal Display Port.
The signal generated for the flat panel display is simultaneously available for an external display. The external display mirrors the built-in display. For more information, see External Display Port.
The graphics IC supports a display size of 1024x768 pixels and also has a scaling mode that displays a 640x480 or 800x600 pixel image on the full screen.
The ATI Mobility Radeon 9550 IC also has a 3D graphics engine for fast rendering of 3D objects.
Because the graphics IC uses the AGP bus, it can use part of main memory as additional graphics storage. The computer’s virtual memory system organizes main memory as randomly-distributed 4 KB pages, so DMA transactions for more than 4 KB of data would have to perform scatter-gather operations. The AGP logic in the Intrepid IC uses a graphics address remapping table (GART) to translate a linear address space for AGP transactions into physical addresses in main memory.
DMA Support
The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the following I/O channels:
Ultra DMA ATA interface to the internal hard drive
IIS channel to the sound IC
The DB-DMA system provides a scatter-gather process based on memory resident data structures that describe the data transfers. The DMA engine is enhanced to allow bursting of data files for improved performance.
Interrupt Support
The Intrepid IC has an interrupt controller (MPIC) that handles interrupts generated within the IC as well as external interrupts, such as those from the Ethernet and FireWire controllers.
ATA-100 Interface
The Intrepid IC provides an Ultra DMA ATA-100 channel that is connected to the internal hard disk drive. The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the Ultra DMA interface.
The internal hard disk drive is connected as device 0 (master) in an ATA Device 0/1 configuration.
EIDE Interface
The Intrepid IC provides an EIDE interface that supports the optical drive. The optical drive is an ATAPI drive and is device-selected as master in an ATA device configuration.
USB 1.1 Controllers
The external USB interface is via the PCI USB controller; see PCI USB 2.0 Controller.
The Intrepid IC has three independent USB 1.1 host controllers each with a maximum data rate of 12 Mbps. The controllers comply with USB Open Host Controller Interface (OHCI).
In the iBook, one of the Intrepid USB host controllers is used for the Bluetooth adapter and one for the trackpad. The other host controller is disabled for power savings reasons.
Modem Support
The internal modem is connected to an internal I2S port. The internal modem is a separate module that contains the datapump IC and the interface to the telephone line (DAA). The controller functions are performed by the main processor. See Internal Modem.
Audio Circuitry
The iBook has audio circuitry that is connected to the Intrepid IC by a standard I2S bus. The Intrepid IC provides DB-DMA (descriptor-based direct memory access) support for the I2S port.
The audio circuitry includes a signal processing IC that handles the equalization and volume control functions and a codec IC that performs A-to-D and D-to-A conversion.
All audio is handled digitally inside the computer. The audio circuitry performs digital-to-analog conversion for the audio signals to the internal speakers and the headphone mini-jack. The audio circuitry also provides parametric equalization for the internal speakers.
Modem progress audio is connected as a digital input to the audio circuitry so that it can be mixed into the audio output stream. The modem progress audio is processed as play-through only, not as a digital audio source.
The iBook has no dedicated audio input jack. The audio system supports the built-in microphone and other audio input by way of a USB microphone or other USB audio device. For information about audio system operation, see Audio System.
Power Control IC
The power manager IC in the iBook is a Mitsubishi M16C/62F microprocessor, also called the PMU99. It operates with its own RAM and ROM. The functions of the PMU99 include:
controlling the sleep and power on and off sequences
controlling power to the other ICs
monitoring the battery charge level
controlling battery charging
supporting the interface to the built-in keyboard and trackpad
keeping track of real time clock operations, including date and time
The iBook can operate from a 15-volt power outlet on an airliner, however for safety reasons the computer will not allow battery charging. In order for the computer to detect the connection to airline power, the airline power cable (available separately) should have a sense resistor of 24.3K ohms connected between the power plug's shell and ground.
The PMU99 also provides the hardware interface to the keyboard and trackpad. Software in the PMU99 IC scans the keyboard and receives data from the trackpad, then sends the data to the system in packets like those from the ADB. To the system, the keyboard and trackpad behave as if they were ADB devices.
Sudden Motion Sensor
The Sudden Motion Sensor (SMS) helps to detect an accidental drop or fall by sensing a change in position and accelerated movement of the iBook. In the event of a drop, the SMS parks the hard drive heads to help lessen the risk of damage to the hard drive on impact. When the SMS senses that the iBook position is once again stable, it unlocks the hard drive heads and the system is up and running within seconds.
AirPort Extreme Interface
AirPort Extreme contains a media access controller (MAC), a digital signal processor (DSP), and a radio-frequency (RF) section.
AirPort Extreme is compliant with the IEEE 802.11g standard. The module transmits and receives data at up to 54 Mbps and is compatible with 802.11b-standard 11 Mbps systems and older 802.11b-standard systems. For information about its operation, see AirPort Extreme.
PCI USB 2.0 Controller
The iBook CPU uses a PCI USB controller with one Enhanced Host Controller Interface (EHCI) function and two Open Host Controller Interface (OHCI) functions. The controller supports two external USB 2.0 ports.
The two external USB ports comply with the Universal Serial Bus Specification 2.0. The USB register set complies with the EHCI and OHCI specifications. For more information, see USB Ports.
The two external USB 2.0 connectors support USB devices with data transfer rates of up to 480 Mbps. For more information about the connectors, see USB Connector.
All USB devices connected to the iBook are required to support USB-suspend mode as defined in the USB specification. For additional reference information, see USB Interface.
The USB ports on the iBook comply with the Universal Serial Bus Specification 2.0. The USB controllers comply with the EHCI specification; the companion controllers comply with the OHCI specification.
For information on the Intrepid USB 1.1 interface, see USB 1.1 Controllers.
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