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Inside Macintosh: Mac OS Runtime Architectures /

Chapter 10 - Classic 68K Runtime Architecture / How 32-Bit Everything Is Implemented

Expanding Global Data and the Jump Table

Because jump-table entries and global data are both referenced relative to A5, far references to global data and to jump table entries are handled in a similar way.

If you compile and link units with any option that specifies the far model for data, any instruction that references global data is generated with a 32-bit absolute address. This address is the byte offset of the data item relative to the address stored in A5. The address of any instruction that references global data is stored in compressed form in an area called A5 relocation information. The modified _LoadSeg trap, using this information and the address stored in A5 at load time, relocates each instruction during loading by subtracting the 32-bit address field of the instruction from the value of A5.

If you compile and link units with any option that specifies the far model for code, any JSR instruction that references a jump-table entry is generated with a 32-bit absolute address. The address of any instruction that makes such a reference is recorded in compressed form in the A5 relocation information area. The modified _LoadSeg trap adds the value of A5 to the address fields of the JSR instruction at load time.

Note that because intersegment references linked under this model appear in the disassembled code as JSR instructions to an absolute address, it is no longer obvious that you are going through the jump table. If the value of the address is greater than that in A5, it is possible you are going through the jump table.

For additional information about A5 relocation information, see the section "The Far Model Segment Header Structure" (page 10-23).