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  "title" : "vBigNum"
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# vBigNum

Perform arithmetic and logical functions on large integers.

## Discussion

The vBigNum module provides arithmetic and logical operations on large integers with lengths of 128, 256, 512, or 1024 bits.

vBigNum includes data types that represent large integer quantities, such as [`vS512`](/documentation/Accelerate/vS512), which defines a 512-bit signed integer. The function names begin with the data type, followed by the name of the operation. For example, [`vS512Add(_:_:_:)`](/documentation/Accelerate/vS512Add(_:_:_:)) performs the addition of two 512-bit signed integers.

## Topics

### Shifting and rotating large integers

[`vLL256Shift(_:_:_:)`](/documentation/Accelerate/vLL256Shift(_:_:_:))

256-bit logical left shift.

[`vLR256Shift(_:_:_:)`](/documentation/Accelerate/vLR256Shift(_:_:_:))

256-bit logical right shift.

[`vA256Shift(_:_:_:)`](/documentation/Accelerate/vA256Shift(_:_:_:))

256-bit arithmetic shift.

[`vLL512Shift(_:_:_:)`](/documentation/Accelerate/vLL512Shift(_:_:_:))

512-bit logical left shift.

[`vLR512Shift(_:_:_:)`](/documentation/Accelerate/vLR512Shift(_:_:_:))

512-bit logical right shift .

[`vA512Shift(_:_:_:)`](/documentation/Accelerate/vA512Shift(_:_:_:))

512-bit arithmetic shift.

[`vLL1024Shift(_:_:_:)`](/documentation/Accelerate/vLL1024Shift(_:_:_:))

1024-bit logical left shift.

[`vLR1024Shift(_:_:_:)`](/documentation/Accelerate/vLR1024Shift(_:_:_:))

1024-bit logical right shift .

[`vA1024Shift(_:_:_:)`](/documentation/Accelerate/vA1024Shift(_:_:_:))

1024-bit arithmetic shift.

[`vL256Rotate(_:_:_:)`](/documentation/Accelerate/vL256Rotate(_:_:_:))

256-bit left rotate.

[`vR256Rotate(_:_:_:)`](/documentation/Accelerate/vR256Rotate(_:_:_:))

256-bit right rotate.

[`vL512Rotate(_:_:_:)`](/documentation/Accelerate/vL512Rotate(_:_:_:))

512-bit left rotate.

[`vR512Rotate(_:_:_:)`](/documentation/Accelerate/vR512Rotate(_:_:_:))

512-bit right rotate.

[`vL1024Rotate(_:_:_:)`](/documentation/Accelerate/vL1024Rotate(_:_:_:))

1024-bit left rotate.

[`vR1024Rotate(_:_:_:)`](/documentation/Accelerate/vR1024Rotate(_:_:_:))

1024-bit right rotate.

### Performing arithmetic operations on large integers

[`vU256Add(_:_:_:)`](/documentation/Accelerate/vU256Add(_:_:_:))

Unsigned 256-bit addition (modular arithmetic).

[`vU256AddS(_:_:_:)`](/documentation/Accelerate/vU256AddS(_:_:_:))

Unsigned 256-bit addition with saturation (clipping).

[`vS256Add(_:_:_:)`](/documentation/Accelerate/vS256Add(_:_:_:))

Signed 256-bit addition (modular arithmetic).

[`vS256AddS(_:_:_:)`](/documentation/Accelerate/vS256AddS(_:_:_:))

Signed 256-bit addition with saturation (clipping).

[`vU512Add(_:_:_:)`](/documentation/Accelerate/vU512Add(_:_:_:))

Unsigned 512-bit addition (modular arithmetic).

[`vU512AddS(_:_:_:)`](/documentation/Accelerate/vU512AddS(_:_:_:))

Unsigned 512-bit addition with saturation (clipping).

[`vS512Add(_:_:_:)`](/documentation/Accelerate/vS512Add(_:_:_:))

Signed 512-bit addition (modular arithmetic).

[`vS512AddS(_:_:_:)`](/documentation/Accelerate/vS512AddS(_:_:_:))

Signed 512-bit addition with saturation (clipping).

[`vU1024Add(_:_:_:)`](/documentation/Accelerate/vU1024Add(_:_:_:))

Unsigned 1024-bit addition (modular arithmetic).

[`vU1024AddS(_:_:_:)`](/documentation/Accelerate/vU1024AddS(_:_:_:))

Unsigned 1024-bit addition with saturation (clipping).

[`vS1024Add(_:_:_:)`](/documentation/Accelerate/vS1024Add(_:_:_:))

Signed 1024-bit addition (modular arithmetic).

[`vS1024AddS(_:_:_:)`](/documentation/Accelerate/vS1024AddS(_:_:_:))

Signed 1024-bit addition with saturation (clipping).

[`vU256Sub(_:_:_:)`](/documentation/Accelerate/vU256Sub(_:_:_:))

Unsigned 256-bit subtraction (modular arithmetic).

[`vU256SubS(_:_:_:)`](/documentation/Accelerate/vU256SubS(_:_:_:))

Unsigned 256-bit subtraction with saturation (clipping).

[`vS256Sub(_:_:_:)`](/documentation/Accelerate/vS256Sub(_:_:_:))

Signed 256-bit subtraction (modular arithmetic).

[`vS256SubS(_:_:_:)`](/documentation/Accelerate/vS256SubS(_:_:_:))

Signed 256-bit subtraction with saturation (clipping).

[`vU512Sub(_:_:_:)`](/documentation/Accelerate/vU512Sub(_:_:_:))

Unsigned 512-bit subtraction (modular arithmetic).

[`vU512SubS(_:_:_:)`](/documentation/Accelerate/vU512SubS(_:_:_:))

Unsigned 512-bit subtraction with saturation (clipping).

[`vS512Sub(_:_:_:)`](/documentation/Accelerate/vS512Sub(_:_:_:))

Signed 512-bit subtraction (modular arithmetic).

[`vS512SubS(_:_:_:)`](/documentation/Accelerate/vS512SubS(_:_:_:))

Signed 512-bit subtraction with saturation (clipping).

[`vU1024Sub(_:_:_:)`](/documentation/Accelerate/vU1024Sub(_:_:_:))

Unsigned 1024-bit subtraction (modular arithmetic).

[`vU1024SubS(_:_:_:)`](/documentation/Accelerate/vU1024SubS(_:_:_:))

Unsigned 1024-bit subtraction with saturation (clipping).

[`vS1024Sub(_:_:_:)`](/documentation/Accelerate/vS1024Sub(_:_:_:))

Signed 1024-bit subtraction (modular arithmetic).

[`vS1024SubS(_:_:_:)`](/documentation/Accelerate/vS1024SubS(_:_:_:))

Signed 1024-bit subtraction with saturation (clipping).

[`vU64Neg(_:)`](/documentation/Accelerate/vU64Neg(_:))

Unsigned 64-bit negation.

[`vU128Neg(_:)`](/documentation/Accelerate/vU128Neg(_:))

Unsigned 128-bit negation.

[`vU256Neg(_:_:)`](/documentation/Accelerate/vU256Neg(_:_:))

Unsigned 256-bit negation.

[`vS64Neg(_:)`](/documentation/Accelerate/vS64Neg(_:))

Signed 64-bit negation.

[`vS128Neg(_:)`](/documentation/Accelerate/vS128Neg(_:))

Signed 128-bit negation.

[`vS256Neg(_:_:)`](/documentation/Accelerate/vS256Neg(_:_:))

Signed 256-bit negation.

[`vU512Neg(_:_:)`](/documentation/Accelerate/vU512Neg(_:_:))

Unsigned 512-bit negation.

[`vS512Neg(_:_:)`](/documentation/Accelerate/vS512Neg(_:_:))

Signed 512-bit negation.

[`vU1024Neg(_:_:)`](/documentation/Accelerate/vU1024Neg(_:_:))

Unsigned 1024-bit negation.

[`vS1024Neg(_:_:)`](/documentation/Accelerate/vS1024Neg(_:_:))

Signed 1024-bit negation.

[`vU256Mod(_:_:_:)`](/documentation/Accelerate/vU256Mod(_:_:_:))

Unsigned 256-bit mod.

[`vS256Mod(_:_:_:)`](/documentation/Accelerate/vS256Mod(_:_:_:))

Signed 256-bit mod.

[`vU512Mod(_:_:_:)`](/documentation/Accelerate/vU512Mod(_:_:_:))

Unsigned 512-bit mod.

[`vS512Mod(_:_:_:)`](/documentation/Accelerate/vS512Mod(_:_:_:))

Signed 512-bit mod.

[`vU1024Mod(_:_:_:)`](/documentation/Accelerate/vU1024Mod(_:_:_:))

Unsigned 1024-bit mod.

[`vS1024Mod(_:_:_:)`](/documentation/Accelerate/vS1024Mod(_:_:_:))

Signed 256-bit Mod.

[`vU256HalfMultiply(_:_:_:)`](/documentation/Accelerate/vU256HalfMultiply(_:_:_:))

Unsigned 256-bit multiplication; result is the same width as multiplicands.

[`vS256HalfMultiply(_:_:_:)`](/documentation/Accelerate/vS256HalfMultiply(_:_:_:))

Signed 256-bit multiplication; result is the same width as multiplicands.

[`vU512HalfMultiply(_:_:_:)`](/documentation/Accelerate/vU512HalfMultiply(_:_:_:))

Unsigned 512-bit multiplication; result is the same width as multiplicands.

[`vS512HalfMultiply(_:_:_:)`](/documentation/Accelerate/vS512HalfMultiply(_:_:_:))

Signed 512-bit multiplication; result is the same width as multiplicands.

[`vU1024HalfMultiply(_:_:_:)`](/documentation/Accelerate/vU1024HalfMultiply(_:_:_:))

Unsigned 1024-bit multiplication; result is the same width as multiplicands.

[`vS1024HalfMultiply(_:_:_:)`](/documentation/Accelerate/vS1024HalfMultiply(_:_:_:))

Signed 1024-bit multiplication; result is the same width as multiplicands.

[`vU128FullMultiply(_:_:_:)`](/documentation/Accelerate/vU128FullMultiply(_:_:_:))

Unsigned 128-bit multiplication; result is twice as wide as multiplicands.

[`vS128FullMultiply(_:_:_:)`](/documentation/Accelerate/vS128FullMultiply(_:_:_:))

Signed 128-bit multiplication; result is twice as wide as multiplicands.

[`vU256FullMultiply(_:_:_:)`](/documentation/Accelerate/vU256FullMultiply(_:_:_:))

Unsigned 256-bit multiplication; result is twice as wide as multiplicands.

[`vS256FullMultiply(_:_:_:)`](/documentation/Accelerate/vS256FullMultiply(_:_:_:))

Signed 256-bit multiplication; result is twice as wide as multiplicands.

[`vU512FullMultiply(_:_:_:)`](/documentation/Accelerate/vU512FullMultiply(_:_:_:))

Unsigned 512-bit multiplication; result is twice as wide as multiplicands.

[`vS512FullMultiply(_:_:_:)`](/documentation/Accelerate/vS512FullMultiply(_:_:_:))

Signed 512-bit multiplication; result is twice as wide as multiplicands.

[`vU256Divide(_:_:_:_:)`](/documentation/Accelerate/vU256Divide(_:_:_:_:))

Unsigned 256-bit division.

[`vS256Divide(_:_:_:_:)`](/documentation/Accelerate/vS256Divide(_:_:_:_:))

Computes the signed 256-bit division.

[`vU512Divide(_:_:_:_:)`](/documentation/Accelerate/vU512Divide(_:_:_:_:))

Computes the unsigned 512-bit division.

[`vS512Divide(_:_:_:_:)`](/documentation/Accelerate/vS512Divide(_:_:_:_:))

Signed 512-bit division.

[`vU1024Divide(_:_:_:_:)`](/documentation/Accelerate/vU1024Divide(_:_:_:_:))

Unsigned 1024-bit division.

[`vS1024Divide(_:_:_:_:)`](/documentation/Accelerate/vS1024Divide(_:_:_:_:))

Signed 1024-bit division.

### Data types

[`vU128`](/documentation/Accelerate/vU128)

A union containing one `vUInt32` vector or four 32-bit integers, representing a 128-bit unsigned integer.

[`vS128`](/documentation/Accelerate/vS128)

A union containing one `vSInt32` vector or four 32-bit integers, representing a 128-bit signed integer.

[`vU256`](/documentation/Accelerate/vU256)

A union containing an array or structure of two `vUInt32` vectors or eight 32-bit integers, representing a 256-bit unsigned integer.

[`vS256`](/documentation/Accelerate/vS256)

A union containing an array or structure of two `vUInt32` vectors or eight 32-bit integers, representing a 256-bit signed integer.

[`vU512`](/documentation/Accelerate/vU512)

A union containing an array or structure of four `vUInt32` vectors or sixteen 32-bit integers, representing a 256-bit unsigned integer.

[`vS512`](/documentation/Accelerate/vS512)

A union containing an array or structure of four `vUInt32` vectors or sixteen 32-bit integers, representing a 256-bit signed integer.

[`vU1024`](/documentation/Accelerate/vU1024)

A union containing an array or structure of eight `vUInt32` vectors or thirty-two 32-bit integers, representing a 1024-bit unsigned integer.

[`vS1024`](/documentation/Accelerate/vS1024)

A union containing an array or structure of eight `vUInt32` vectors or thirty-two 32-bit integers, representing a 1024-bit signed integer.


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