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# hv_vcpu_set_sme_state(_:_:)

Sets the SME state consisting of the streaming Scalable Vector Extension (SVE) mode and ZA storage enable.

```
func hv_vcpu_set_sme_state(_ vcpu: hv_vcpu_t, _ sme_state: UnsafePointer<hv_vcpu_sme_state_t>) -> hv_return_t
```

## Parameters

`vcpu`

The ID of the vCPU instance.

`sme_state`

The pointer to the SME state to set.

## Return Value

`HV_SUCCESS` on success, `HV_UNSUPPORTED` if SME is not supported on the platform, or an error code otherwise.

## Discussion

> Important:
> You need to call this on the owning thread

For any entry or exit from streaming SVE mode, all Z vector and P predicate registers are set to zero, and all FPSR flags are set; you need to save this state if you need to retain it across streaming SVE mode transitions.

In streaming SVE mode, the system aliases the SIMD Q registers to the bottom `128` bits of the corresponding Z register, and any modification reflects on the Z register state.

If the optional `FEAT_SME_FA64` is implemented, the full SIMD instruction set is supported in streaming SVE mode; otherwise many legacy SIMD instructions are illegal in this mode.

When finished, disable streaming SVE mode and ZA storage; this serves as a power-down hint for SME-related hardware.

---

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