Inside Macintosh: PowerPC Numerics / Part 3 - Numerics in PowerPC Assembly Language

Chapter 11 - Introduction to Assembly-Language Numerics

Load and Store Instructions

Before you perform any floating-point computation, you must load a value into a floating-point register. To do this, use one of the load instructions. Load instructions load either single or double floating-point numbers from memory into floating-point registers. Store instructions take the contents of a floating-point register and store them in memory.

Load and store instructions take one of two forms depending on which address mode is used. The first form is

instr FPR, D(GPR)

instr

Specifies which type of load or store is to be performed.

FPR

A floating-point register, which is either the source or the destination for the operation, depending on whether it is a load or a store.

D

A 16-bit signed integer value.

GPR

A general-purpose register or the value 0.

The D(GPR) part of the instruction determines the memory address involved. If GPR is not 0, it is interpreted as a general-purpose register and the contents of register GPR are added to the value D to produce the memory address. If GPR is 0, it is interpreted as the value 0 rather than as register GPR0, so 0 is added to D to produce the memory address.

Load instructions of this form are interpreted as FPR \xC6 (D + (GPR)), which means that the instruction loads into FPR the contents of the memory address obtained by adding D to the contents of GPR (unless GPR is 0).

Store instructions of this form are interpreted as D + (GPR) \xC6 (FPR), which means that the instruction stores the contents of FPR at the memory address obtained by adding D to the contents of GPR (unless GPR is 0).

The second form for load and store operations uses a different address mode:

instr FPR, GPR1, GPR2

instr

Specifies which type of load or store is to be performed.

FPR

A floating-point register, which is either the source or the destination for the operation, depending on whether it is a load or a store.

GPR1

A general purpose register or the value 0.

GPR2

A general-purpose register.

GPR1 and GPR2 determine the memory address involved. If GPR1 is not 0, it is interpreted as a general-purpose register, and the contents of register GPR1 are added to the contents of register GPR2 to produce the memory address. If GPR1 is 0, it is interpreted as the value 0 rather than as register GPR0, so 0 is added to the contents of register GPR2 to produce the memory address.

Load instructions of this form are interpreted as FPR \xC6 ((GPR1) + (GPR2)) unless GPR1 is 0.

Store instructions of this form are interpreted as (GPR1) + (GPR2) \xC6 (FPR) unless
GPR1 is 0.

Table 11-1 lists and describes the PowerPC load and store instructions. There are two load and two store instructions for each address mode. One version simply performs
the load or store, and the other version puts the effective memory address into the general-purpose register specified in the instruction (shown as Rn in the table).

Each of the load and store instructions has a single and a double form, making a total of eight load and eight store instructions. If the single form of a load instruction is used, the number is converted to double format before the load is performed. If the single form of a store instruction is used, the number is converted to single format before it is stored. See Chapter 13, "Assembly-Language Numeric Conversions," for more information about conversions performed during load and store operations.

None of the load and store instructions raise floating-point exceptions or make special cases of zeros, NaNs, or Infinities.

Table 11-1 Load and store floating-point instructions

Address mode	Instruction syntax	Operation
d(Rn)	lfd DST, n(GPR)	Load double format
	stfd SRC, n(GPR)	Store double format
	lfs DST, n(GPR)	Load single format
	stfs SRC, n(GPR)	Store single format
	lfdu DST, n(GPR)	Load double format and update
	stfdu SRC, n(GPR)	Store double format and update
	lfsu DST, n(GPR)	Load single format and update
	stfsu SRC, n(GPR)	Store single format and update
Rn, Rm	lfdx DST, GPR1, GPR2	Load double format indexed
	stfdx SRC, GPR1, GPR2	Store double format indexed
	lfsx DST, GPR1,GPR2	Load single format indexed
	stfsx SRC, GPR1, GPR2	Store single format indexed
	lfdux DST, GPR1, GPR2	Load double format and update indexed
	stfdux SRC, GPR1, GPR2	Store double format and update indexed
	lfsux DST, GPR1, GPR2	Load single format and update indexed
	stfsux SRC, GPR1, GPR2	Store single format and update indexed