Legacy Document
Important: The information in this document is obsolete and should not be used for new development.
Important: The information in this document is obsolete and should not be used for new development.
Instructions
- Note
- Throughout the tables that follow, in the Exceptions column, I = invalid; X = inexact; O = overflow; U = underflow; D = divide by zero. In the Instructions column, * = append dot (.) to instruction name to update CR1.
Table F-5 FPSCR instructions Instruction Description SRC DST Exceptions mcrfsDST,SRCDST <-- (SRC) FPSCR field CR field - - - - - mffs*DSTDST <-- (FPSCR) FPSCR FPR - - - - - mtfsf*DST,SRCDST <-- SRC FPR FPSCR field - - - - - mtfsfi*DST,nDST <-- n 16-bit signed int FPSCR field - - - - - mtfsb1*DSTDST <-- 1 -- FPSCR bit - - - - - mtfsb0*DSTDST <-- 0 -- FPSCR bit - - - - -
Table F-6 Load instructions Instruction Description SRC DST Exceptions lfdDST,n(GPR)DST <-- (n + (GPR)) Memory FPR - - - - -lfduDST,n(GPR)DST <-- (n + (GPR))
GPR <-- n + (GPR)Memory FPR - - - - -lfdxDST,GPR1,GPR2DST <-- ((GPR1) + (GPR2)) Memory FPR - - - - -lfduxDST,GPR1,GPR2DST <-- ((GPR1) + (GPR2))
GPR1 <-- (GPR1) + (GPR2)Memory FPR - - - - -lfsDST,n(GPR)DST <-- (n + (GPR)) [80] Memory FPR - - - - -lfsuDST,n(GPR)DST <-- (n + (GPR))
GPR <-- n + (GPR)Memory FPR - - - - -lfsxDST,GPR1,GPR2DST <-- ((GPR1) + (GPR2)) Memory FPR - - - - -lfsuxDST,GPR1,GPR2DST <-- ((GPR1) + (GPR2))
GPR1 <-- (GPR1) + (GPR2)Memory FPR - - - - -
Table F-7 Store instructions Instruction Description SRC DST Exceptions stfdSRC,n(GPR)n + (GPR)<-- (SRC) FPR Memory - - - - - stfduSRC,n(GPR)n + (GPR)<-- (SRC)
GPR <-- n + (GPR)FPR Memory - - - - - stfdxSRC,GPR1,GPR2(GPR1) + (GPR2)<-- (SRC) FPR Memory - - - - - stfduxSRC,GPR1,GPR2(GPR1) + (GPR2)<-- (SRC)
GPR1 <-- (GPR1) + (GPR2)FPR Memory - - - - - stfsSRC,n(GPR)n + (GPR)<-- (SRC) [82] FPR Memory - - - - - stfsuSRC,n(GPR)n + (GPR)<-- (SRC)
GPR <-- n + (GPR)FPR Memory - - - - - stfsxSRC,GPR1,GPR2(GPR1) + (GPR2)<-- (SRC) FPR Memory - - - - - stfsuxSRC,GPR1,GPR2(GPR1) + (GPR2)<-- (SRC)
GPR1 <-- (GPR1) + (GPR2)FPR Memory - - - - -
Table F-8 Conversions to integer format Instruction Description SRC DST Exceptions fctiw* DST,SRCDST <-- (SRC) rounded to 32-bit int FPR GPR I X - - - fctiwz* DST,SRCDST <-- (SRC) truncated to 32-bit int FPR GPR I X - - -
Table F-9 Conversions from double to single format Instruction Description SRC DST Exceptions frsp* DST,SRCDST <-- (SRC) rounded to single format FPR FPR I X O U -
Table F-10 Comparison instructions Instruction Description SRC DST Exceptions fcmpoDST,SRC1,SRC2DST <-- (SRC1) compare (SRC2) FPRs CR field I - - - - fcmpuDST,SRC1,SRC2DST <-- (SRC1) compare (SRC2) FPRs CR field - - - - -
Table F-11 Arithmetic instructions Instruction Description SRC DST Exceptions fadd* DST,SRC1,SRC2DST <-- (SRC1) + (SRC2) FPRs FPR I X O U - fsub* DST,SRC1,SRC2DST <-- (SRC1) - (SRC2) FPRs FPR I X O U - fmul* DST,SRC1,SRC2DST <-- (SRC1) (SRC2) FPRs FPR I X O U - fdiv* DST,SRC1,SRC2DST <-- (SRC1) / (SRC2) FPRs FPR I X O U D
Table F-12 Multiply-add instructions Instruction Description SRC DST Exceptions fmadd* DST,SRC1,SRC2,SRC3DST <-- (SRC1) (SRC2)
+ (SRC3)FPRs FPR I X O U - fmsub* DST,SRC1,SRC2,SRC3DST <-- (SRC1) (SRC2)
- (SRC3)FPRs FPR I X O U - fnmadd* DST,SRC1,SRC2,SRC3DST <-- - ((SRC1) (SRC2) + (SRC3)) FPRs FPR I X O U - fnmsub* DST,SRC1,SRC2,SRC3DST <-- - ((SRC1) (SRC2) - (SRC3)) FPRs FPR I X O U -
Table F-13 Move instructions Instruction Description SRC DST Exceptions fabs* DST,SRCDST <-- |(SRC)| FPR FPR - - - - - fmr* DST,SRCDST <-- (SRC) FPR FPR - - - - - fneg* DST,SRCDST <-- - (SRC) FPR FPR - - - - - fnabs* DST,SRCDST <-- - |(SRC)| FPR FPR - - - - - 
[80] Converts single to double format automatically.
[82] Converts double to single automatically.