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Inside Macintosh: PowerPC Numerics / Part 3 - Numerics in PowerPC Assembly Language
Chapter 14 - Assembly-Language Numeric Operations


Arithmetic Operations

PowerPC assembly language supports five of the seven IEEE arithmetic operations:

Except for the round-to-integer operation, these operations may be performed by a variety of instructions. The instructions that perform arithmetic operations are divided into three categories: arithmetic instructions, multiply-add instructions, and move instructions. (fctiw, described in Chapter 13, "Assembly-Language Numeric Conversions," performs the round-to-integer operation.)

Arithmetic Instructions

There are four arithmetic instructions:
faddAdds two floating-point values.
fsubSubtracts two floating-point values.
fmulMultiplies two floating-point values.
fdivDivides two floating-point values.

Note
These instructions might raise floating-point exceptions. See the Motorola PowerPC 601 RISC Microprocessor User's Manual for more information.
Floating-point arithmetic instructions have three operands, all of which are floating-point registers. They are of the form

instr DST, SRC1, SRC2

Arithmetic instructions are interpreted as

DST \xC6 SRC1 op SRC2

where SRC1, SRC2, and DST are floating-point registers and op is some operation.

Each of these instructions works on both single and double floating-point numbers. There are four versions of each instruction:

instr
Perform operation specified by instr. Interpret data in floating-point registers as double format.
instr.
Perform operation specified by instr. Interpret data in floating-point registers as double format. Record any exceptions raised in the Condition Register.
instrs
Perform operation specified by instr. Interpret data in floating-point registers as single format.
instrs.
Perform operation specified by instr. Interpret data in floating-point registers as single format. Record any exceptions raised in the Condition Register.
Note that all exceptions are always recorded in the FPSCR and are sometimes recorded in the Condition Register as well.

The following example adds two double floating-point numbers and stores the results:

lfd      f1,d(r1)    # load double number into register f1
lfd      f2,d(r2)    # load double number into register f2
fadd     f0,f1,f2    # f0 contains result
stfd     f0,d(r3)    # store result in double format
And the next example adds two single floating-point numbers and stores the results:

lfs      f1,d(r4)    # load single number into register f1
frsp     f1,f1       # stay single
lfs      f2,d(r5)    # load single number into register f2
frsp     f2,f2       # stay single
fadds.   f0,f1,f2    # result placed in f0 in single format
                     # CR1 reflects any exceptions
stfs     f0,d(r6)    # store result in single format

Multiply-Add Instructions

There are four multiply-add instructions:
fmaddPerform multiply, add.
fmsubPerform multiply, subtract.
fnmaddPerform multiply, add, and negate.
fnmsubPerform multiply, subtract, and negate.

Note
These instructions might raise floating-point exceptions. See the Motorola PowerPC 601 RISC Microprocessor User's Manual for more information.
PowerPC assembly language provides the multiply-add instructions to perform more complex operations with at most a single roundoff error rather than the two potential roundoff errors that would result from performing the operations separately.

The multiply-add instructions take four operands, all of which are floating-point registers:

instr DST, SRC1, SRC2, SRC3

Multiply-add instructions are interpreted as

DST \xC6 (SRC1 SRC2) \xB1 SRC3

where SRC1, SRC2, SRC3, and DST are floating-point registers.

Multiply-add instructions can take one of four forms:

instr
Perform operation specified by instr. Interpret data in floating-point registers as double format.
instr.
Perform operation specified by instr. Interpret data in floating-point registers as double format. Record any exceptions raised in the Condition Register.
instrs
Perform operation specified by instr. Interpret data in floating-point registers as single format.
instrs.
Perform operation specified by instr. Interpret data in floating-point registers as single format. Record any exceptions raised in the Condition Register.
Note that all exceptions are always recorded in the FPSCR and are sometimes recorded in the Condition Register as well.

The following example multiplies two double-format numbers, adds a third, and stores the result:

lfd      f1,d(r1)    # load double number into register f1
lfd      f2,d(r2)    # load double number into register f2
lfd      f3,d(r3)    # load double number into register f3
fmadd    f0,f1,f2,f3 # f0 = f1  f2 + f3
stfd     f0,d(r4)    # store result as double format
The following example performs the same operations on single-format numbers:

lfs      f1,d(r5)    # load single number into register f1
frsp     f1,f1       # stay single
lfs      f2,d(r6)    # load single number into register f2
frsp     f2,f2       # stay single
lfs      f3,d(r7)    # load single number into register f3
frsp     f3,f3       # stay single
fmadds.  f0,f1,f2    # f0 = f1  f2 + f3
                     # f0 contains single format number
                     # CR1 reflects any exceptions
stfs     f0,d(r8)    # store result in single format

Move Instructions

There are four move instructions:
fabsMove absolute value of register.
fmrMove register value.
fnegMove negative value of register.
fnabsMove negative absolute value of register.

Move instructions perform sign manipulations while copying a value from one floating-point register to another. Because they manipulate only the sign bit, they generate no floating-point exceptions. They take two operands, both of which are floating-point registers. They are of the form

instr DST, SRC

Floating-point move instructions are interpreted as

DST \xC6 op SRC

where SRC and DST are floating-point registers and op is some operation that is performed on the contents of SRC.

Note that you may copy a value from a register into the same register. For example:

fneg  f1,f1    # f1 has just been negated

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© Apple Computer, Inc.
13 JUL 1996